%0 Journal Article %1 journals/tvlsi/ChoP08 %A Cho, Minsik %A Pan, David Z. %D 2008 %J IEEE Trans. VLSI Syst. %K dblp %N 12 %P 1713-1717 %T Fast Substrate Noise Aware Floorplanning for Mixed Signal SOC Designs. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi16.html#ChoP08 %V 16

@article{journals/tvlsi/ChoP08, added-at = {2009-01-31T00:00:00.000+0100}, author = {Cho, Minsik and Pan, David Z.}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/24c9d8603ba6837c001c41154417ab064/dblp}, ee = {http://dx.doi.org/10.1109/TVLSI.2008.2001734}, interhash = {5e735d40e4c603ac27979c3f176bb1ca}, intrahash = {4c9d8603ba6837c001c41154417ab064}, journal = {IEEE Trans. VLSI Syst.}, keywords = {dblp}, number = 12, pages = {1713-1717}, timestamp = {2016-02-02T02:13:15.000+0100}, title = {Fast Substrate Noise Aware Floorplanning for Mixed Signal SOC Designs.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi16.html#ChoP08}, volume = 16, year = 2008 }