%0 Journal Article %1 journals/vlsi/NikoubinBPNI10 %A Nikoubin, Tooraj %A Bahrebar, Poona %A Pouri, Sara %A Navi, Keivan %A Iravani, Vaez %D 2010 %J VLSI Design %K dblp %P 264390:1-264390:17 %T Simple Exact Algorithm for Transistor Sizing of Low-Power High-Speed Arithmetic Circuits. %U http://dblp.uni-trier.de/db/journals/vlsi/vlsi2010.html#NikoubinBPNI10 %V 2010

@article{journals/vlsi/NikoubinBPNI10, added-at = {2018-11-24T00:00:00.000+0100}, author = {Nikoubin, Tooraj and Bahrebar, Poona and Pouri, Sara and Navi, Keivan and Iravani, Vaez}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/283f346c75eee54170fe4eac1fcb1927c/dblp}, ee = {https://www.wikidata.org/entity/Q58653678}, interhash = {5605fed563ce8b4c1e04c2067317279a}, intrahash = {83f346c75eee54170fe4eac1fcb1927c}, journal = {VLSI Design}, keywords = {dblp}, pages = {264390:1-264390:17}, timestamp = {2019-09-27T06:27:52.000+0200}, title = {Simple Exact Algorithm for Transistor Sizing of Low-Power High-Speed Arithmetic Circuits.}, url = {http://dblp.uni-trier.de/db/journals/vlsi/vlsi2010.html#NikoubinBPNI10}, volume = 2010, year = 2010 }