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%0 Conference Paper
%1 conf/vlsid/SinhaLRBSZ07
%A Sinha, Debjit
%A Luo, Jianfeng
%A Rajagopalan, Subramanian
%A Batterywala, Shabbir H.
%A Shenoy, Narendra V.
%A Zhou, Hai
%B VLSI Design
%D 2007
%I IEEE Computer Society
%K dblp
%P 875-880
%T Impact of Modern Process Technologies on the Electrical Parameters of Interconnects.
%U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2007.html#SinhaLRBSZ07
%@ 0-7695-2762-0
@inproceedings{conf/vlsid/SinhaLRBSZ07,
added-at = {2015-04-20T00:00:00.000+0200},
author = {Sinha, Debjit and Luo, Jianfeng and Rajagopalan, Subramanian and Batterywala, Shabbir H. and Shenoy, Narendra V. and Zhou, Hai},
biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2388d1991aabcaf9972ee504602a5e998/dblp},
booktitle = {VLSI Design},
crossref = {conf/vlsid/2007},
ee = {http://doi.ieeecomputersociety.org/10.1109/VLSID.2007.90},
interhash = {24f02f6a1ed18ce47e2616cc59f3b956},
intrahash = {388d1991aabcaf9972ee504602a5e998},
isbn = {0-7695-2762-0},
keywords = {dblp},
pages = {875-880},
publisher = {IEEE Computer Society},
timestamp = {2016-02-02T11:08:40.000+0100},
title = {Impact of Modern Process Technologies on the Electrical Parameters of Interconnects.},
url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2007.html#SinhaLRBSZ07},
year = 2007
}
