%0 Journal Article %1 journals/tvlsi/LiuYTZ14 %A Liu, Xiaodong %A Yeap, Gary K. %A Tao, Jun %A Zeng, Xuan %D 2014 %J IEEE Trans. VLSI Syst. %K dblp %N 3 %P 655-666 %T Integrated Algorithm for 3-D IC Through-Silicon Via Assignment. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi22.html#LiuYTZ14 %V 22

@article{journals/tvlsi/LiuYTZ14, added-at = {2014-03-06T00:00:00.000+0100}, author = {Liu, Xiaodong and Yeap, Gary K. and Tao, Jun and Zeng, Xuan}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2a5cfe30dc4d0f1163bd3950b7624c80d/dblp}, ee = {http://dx.doi.org/10.1109/TVLSI.2013.2246876}, interhash = {1d33e83385f201bc5639fbcf308fa1ea}, intrahash = {a5cfe30dc4d0f1163bd3950b7624c80d}, journal = {IEEE Trans. VLSI Syst.}, keywords = {dblp}, number = 3, pages = {655-666}, timestamp = {2016-02-02T02:12:24.000+0100}, title = {Integrated Algorithm for 3-D IC Through-Silicon Via Assignment.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi22.html#LiuYTZ14}, volume = 22, year = 2014 }