%0 Journal Article %1 journals/tcad/SegerJOMABS05 %A Seger, Carl-Johan H. %A Jones, Robert B. %A O'Leary, John W. %A Melham, Thomas F. %A Aagaard, Mark %A Barrett, Clark W. %A Syme, Don %D 2005 %J IEEE Trans. on CAD of Integrated Circuits and Systems %K dblp %N 9 %P 1381-1405 %T An industrially effective environment for formal hardware verification. %U http://dblp.uni-trier.de/db/journals/tcad/tcad24.html#SegerJOMABS05 %V 24

@article{journals/tcad/SegerJOMABS05, added-at = {2019-09-25T00:00:00.000+0200}, author = {Seger, Carl-Johan H. and Jones, Robert B. and O'Leary, John W. and Melham, Thomas F. and Aagaard, Mark and Barrett, Clark W. and Syme, Don}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2252d3a4be0ae6063ef67a0d453391ced/dblp}, ee = {https://doi.org/10.1109/TCAD.2005.850814}, interhash = {1193a4803bd5d748e285098f34bdd81c}, intrahash = {252d3a4be0ae6063ef67a0d453391ced}, journal = {IEEE Trans. on CAD of Integrated Circuits and Systems}, keywords = {dblp}, number = 9, pages = {1381-1405}, timestamp = {2019-09-27T08:26:54.000+0200}, title = {An industrially effective environment for formal hardware verification.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad24.html#SegerJOMABS05}, volume = 24, year = 2005 }