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%0 Conference Paper
%1 conf/asicon/WangCLLNYC15
%A Wang, Tian
%A Cui, Xiaoxin
%A Liao, Kai
%A Liao, Nan
%A Ni, Yewen
%A Yu, Dunshan
%A Cui, Xiaole
%B ASICON
%D 2015
%I IEEE
%K dblp
%P 1-4
%T Employing the mixed FBB/RBB in the design of FinFET logic gates.
%U http://dblp.uni-trier.de/db/conf/asicon/asicon2015.html#WangCLLNYC15
%@ 978-1-4799-8485-5
@inproceedings{conf/asicon/WangCLLNYC15,
added-at = {2018-07-17T00:00:00.000+0200},
author = {Wang, Tian and Cui, Xiaoxin and Liao, Kai and Liao, Nan and Ni, Yewen and Yu, Dunshan and Cui, Xiaole},
biburl = {https://puma.ub.uni-stuttgart.de/bibtex/23038a212aa9f6903dc782419b9268b25/dblp},
booktitle = {ASICON},
crossref = {conf/asicon/2015},
ee = {https://doi.org/10.1109/ASICON.2015.7517049},
interhash = {0994d07ebba153e5c6b39c5daf873961},
intrahash = {3038a212aa9f6903dc782419b9268b25},
isbn = {978-1-4799-8485-5},
keywords = {dblp},
pages = {1-4},
publisher = {IEEE},
timestamp = {2019-09-27T17:19:01.000+0200},
title = {Employing the mixed FBB/RBB in the design of FinFET logic gates.},
url = {http://dblp.uni-trier.de/db/conf/asicon/asicon2015.html#WangCLLNYC15},
year = 2015
}