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A 48-Core IA-32 message-passing processor with DVFS in 45nm CMOS., , , , , , , , , and 20 other author(s). ISSCC, page 108-109. IEEE, (2010)Invasive MPI on Intel's Single-Chip Cloud Computer., , , and . ARCS, volume 7179 of Lecture Notes in Computer Science, page 74-85. Springer, (2012)A 48-Core IA-32 Processor in 45 nm CMOS Using On-Die Message-Passing and DVFS for Performance and Power Scaling., , , , , , , , , and 6 other author(s). J. Solid-State Circuits, 46 (1): 173-183 (2011)Enabling Computation Intensive Applications in Battery-Operated Cyber-Physical Systems., , , , , , and . MARC Symposium, page 34-39. ONERA, The French Aerospace Lab, (2012)SCC: A Flexible Architecture for Many-Core Platform Research., , , and . Computing in Science and Engineering, 13 (6): 79-83 (2011)Connecting the Cloud: Transparent and Flexible Communication for a Cluster of Intel SCCs., , , , and . MARC@RWTH, page 13-19. RWTH Aachen University, (2012)The 48-core SCC Processor: the Programmer's View., , , , , , , , , and 1 other author(s). SC, page 1-11. IEEE, (2010)RCKMPI - Lightweight MPI Implementation for Intel's Single-chip Cloud Computer (SCC)., , and . EuroMPI, volume 6960 of Lecture Notes in Computer Science, page 208-217. Springer, (2011)