Article,

Design and validation of a 10-bit current mode SAR ADC with 58.4 dB SFDR at 50 MS/s in 90 nm CMOS

, , and .
Analog Integrated Circuits and Signal Processing, 89 (2): 283-295 (2016)
DOI: 10.1007/s10470-016-0788-z

Meta data

Tags

Users

  • @jens.anders
  • @iis

Comments and Reviews