%0 Conference Paper %1 conf/dsd/NunezAQ10 %A Núñez, Juan %A Avedillo, Maria J. %A Quintana, José M. %B DSD %D 2010 %E López, Sebastián %I IEEE Computer Society %K dblp %P 621-627 %T Evaluation of RTD-CMOS Logic Gates. %U http://dblp.uni-trier.de/db/conf/dsd/dsd2010.html#NunezAQ10 %@ 978-0-7695-4171-6

@inproceedings{conf/dsd/NunezAQ10, added-at = {2019-10-30T00:00:00.000+0100}, author = {Núñez, Juan and Avedillo, Maria J. and Quintana, José M.}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2f4cf0462c39ff2558e9fc045c6bad004/dblp}, booktitle = {DSD}, crossref = {conf/dsd/2010}, editor = {López, Sebastián}, ee = {http://doi.ieeecomputersociety.org/10.1109/DSD.2010.17}, interhash = {b8df34e9a45ea964652a640f4fbb8f6c}, intrahash = {f4cf0462c39ff2558e9fc045c6bad004}, isbn = {978-0-7695-4171-6}, keywords = {dblp}, pages = {621-627}, publisher = {IEEE Computer Society}, timestamp = {2019-11-02T11:33:16.000+0100}, title = {Evaluation of RTD-CMOS Logic Gates.}, url = {http://dblp.uni-trier.de/db/conf/dsd/dsd2010.html#NunezAQ10}, year = 2010 }