%0 Journal Article %1 journals/vlsisp/WangOS01 %A Wang, Zhong %A O'Neil, Timothy W. %A Sha, Edwin Hsing-Mean %D 2001 %J VLSI Signal Processing %K dblp %N 3 %P 215-233 %T Minimizing Average Schedule Length under Memory Constraints by Optimal Partitioning and Prefetching. %U http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp27.html#WangOS01 %V 27

@article{journals/vlsisp/WangOS01, added-at = {2008-08-06T00:00:00.000+0200}, author = {Wang, Zhong and O'Neil, Timothy W. and Sha, Edwin Hsing-Mean}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2f16d6678f9bb08ac163b8039c4394a65/dblp}, ee = {http://dx.doi.org/10.1023/A:1008114531225}, interhash = {afecd57336331d454f35d4bd83c8e43e}, intrahash = {f16d6678f9bb08ac163b8039c4394a65}, journal = {VLSI Signal Processing}, keywords = {dblp}, number = 3, pages = {215-233}, timestamp = {2016-02-02T09:53:10.000+0100}, title = {Minimizing Average Schedule Length under Memory Constraints by Optimal Partitioning and Prefetching.}, url = {http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp27.html#WangOS01}, volume = 27, year = 2001 }