%0 Journal Article %1 journals/jssc/BelfioreKHE17 %A Belfiore, Guido %A Khafaji, Mahdi M. %A Henker, Ronny %A Ellinger, Frank %D 2017 %J J. Solid-State Circuits %K dblp %N 9 %P 2422-2429 %T A 50 Gb/s 190 mW Asymmetric 3-Tap FFE VCSEL Driver. %U http://dblp.uni-trier.de/db/journals/jssc/jssc52.html#BelfioreKHE17 %V 52

@article{journals/jssc/BelfioreKHE17, added-at = {2018-09-15T00:00:00.000+0200}, author = {Belfiore, Guido and Khafaji, Mahdi M. and Henker, Ronny and Ellinger, Frank}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2080ddf8dfca7db3f0a9516cb8aca52df/dblp}, ee = {https://doi.org/10.1109/JSSC.2017.2717918}, interhash = {8d7ecf0877939d0e9e30c4d760046854}, intrahash = {080ddf8dfca7db3f0a9516cb8aca52df}, journal = {J. Solid-State Circuits}, keywords = {dblp}, number = 9, pages = {2422-2429}, timestamp = {2019-09-27T06:09:41.000+0200}, title = {A 50 Gb/s 190 mW Asymmetric 3-Tap FFE VCSEL Driver.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc52.html#BelfioreKHE17}, volume = 52, year = 2017 }