%0 Conference Paper %1 conf/isspa/WangSB05 %A Wang, Gary %A Salcic, Zoran %A Biglari-Abhari, Morteza %B ISSPA %D 2005 %I IEEE %K dblp %P 239-242 %T Customizing and extending an embedded RISC processor core for real-time video compression. %U http://dblp.uni-trier.de/db/conf/isspa/isspa2005.html#WangSB05 %@ 0-7803-9243-4

@inproceedings{conf/isspa/WangSB05, added-at = {2018-11-24T00:00:00.000+0100}, author = {Wang, Gary and Salcic, Zoran and Biglari-Abhari, Morteza}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2b1663c4b40291e26e10bc227dbc19461/dblp}, booktitle = {ISSPA}, crossref = {conf/isspa/2005}, ee = {https://www.wikidata.org/entity/Q58800495}, interhash = {892100b65601aeaf728b10169d1d09c6}, intrahash = {b1663c4b40291e26e10bc227dbc19461}, isbn = {0-7803-9243-4}, keywords = {dblp}, pages = {239-242}, publisher = {IEEE}, timestamp = {2019-09-27T21:49:56.000+0200}, title = {Customizing and extending an embedded RISC processor core for real-time video compression.}, url = {http://dblp.uni-trier.de/db/conf/isspa/isspa2005.html#WangSB05}, year = 2005 }