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%0 Journal Article
%1 journals/vlsisp/ThulGVKW05
%A Thul, Michael J.
%A Gilbert, Frank
%A Vogt, Timo
%A Kreiselmaier, Gerd
%A Wehn, Norbert
%D 2005
%J VLSI Signal Processing
%K dblp
%N 1-2
%P 63-77
%T A Scalable System Architecture for High-Throughput Turbo-Decoders.
%U http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp39.html#ThulGVKW05
%V 39
@article{journals/vlsisp/ThulGVKW05,
added-at = {2008-07-16T00:00:00.000+0200},
author = {Thul, Michael J. and Gilbert, Frank and Vogt, Timo and Kreiselmaier, Gerd and Wehn, Norbert},
biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2d455f347b2dd634c6f102039055ea45e/dblp},
ee = {http://dx.doi.org/10.1023/B:VLSI.0000047272.75049.0e},
interhash = {5a9d2f110130c1fa7df160fac8af76b9},
intrahash = {d455f347b2dd634c6f102039055ea45e},
journal = {VLSI Signal Processing},
keywords = {dblp},
number = {1-2},
pages = {63-77},
timestamp = {2016-02-02T09:53:05.000+0100},
title = {A Scalable System Architecture for High-Throughput Turbo-Decoders.},
url = {http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp39.html#ThulGVKW05},
volume = 39,
year = 2005
}