%0 Journal Article %1 Oehme_2022 %A Oehme, Michael %A Yu, Zili %A Wanitzek, Maurice %A Epple, Steffen %A Schad, Lena %A Hack, Michael %A Burghartz, Joachim %A Schwarz, Daniel %A Kaschel, Mathias %D 2022 %I The Electrochemical Society, Inc. %J ECS Meeting Abstracts %K iht professional_meetings %N 32 %P 1169 %R 10.1149/MA2022-02321169mtgabs %T Monolithic Integration of Gesn on Si for IR Camera Demonstration %U https://dx.doi.org/10.1149/MA2022-02321169mtgabs %V MA2022-02 %X Due to the development of cost-efficient detector technologies in the NIR (Near Infrared), new areas of application are constantly being addressed. This affects autonomous driving, where LiDAR (Light Detection and Ranging) systems with better eye safety are being developed, as well as low-cost night vision cameras. Another area of application is NIR spectroscopy, e.g. in the areas of food monitoring, environmental research or medical technology. The increasing need for portable, low-cost analysis devices, for example for ön-site" measurements or for everyday life, is driving the development of highly miniaturized and low-cost lab-on-a-chip systems. The NIR detectors and NIR cameras available on the market are primarily based on materials from group III/V compound semiconductors, e.g. InGaAs. However, the CMOS (Complementary Metal Oxide Semiconductor) standard process cannot be used for the production of this technology, which significantly increases the cost factor and thus limits its use on the market. A promising alternative is offered by group IV based detectors, in particular Ge and GeSn detectors, which can be monolithically integrated on a Si substrate. As a result, such detector systems can be processed much more cost-efficiently with CMOS compatible standard technology. The NIR absorption properties are also comparable to III/V components. This paper reports on the monolithic integration of Ge and GeSn detector arrays on Si substrates for the realization of a camera system. The entire system consists of a photonic chip, a readout chip and a standard microcontroller, which is connected to a laptop via USB. The SNR (signal-to-noise ratio) is an important parameter for such an integrated system. The quantum efficiency of each individual pixel sensor has to be maximized and a high fill factor per pixel is aimed for. A particularly high fill factor is achieved here with optical light coupling via the substrate back-side, since the front-side metallization does not interfere with the optical coupling area. Furthermore, the metallization acts then as a mirror, the light thus passes through the absorption area twice and leads to a higher quantum efficiency. However, the main obstacle of Ge and GeSn, compared to III/V devices, is the higher intrinsic charge carrier concentration, which leads to a significantly higher dark current. A possible solution is the zero bias operation of the detector at the expected dark current minimum. The dark current is 3 orders of magnitude smaller at 0 V compared to an operating point at -1 V. Another criterion for the circuit is that a signal range or photocurrent supports a wide dynamic range (between nA and µA). For this purpose, the photocurrent is fed into the evaluation electronics via a triple cascaded current mirror. The measured value is output to a 12-bit ADC (Analog Digital Converter) integrated in the microcontroller via a current/voltage converter, two buffers and a sample hold element. With the help of additional multiplexers, the circuit can be used to read out several detectors and thus address a pixel matrix. We report on the fabrication of the photonic chip, which is carried out using CMOS compatible processes and MEMS (Micro-Electro-Mechanical System) processes in combination with an epitaxial growth of the active device structures. The photonic chip is based on 150 mm Si substrates, which were prepared first with multiple ion implantation steps. The active pin detector layers, consisting of Si and Ge or GeSn, were grown by means of molecular beam epitaxy. Afterwards, deep trenches were now etched between the detectors in a MEMS process to minimize crosstalk between neighboring pixels. The detectors were structured then using CMOS processes, and the backside is polished or structured. Finally, a two layer frontside-metallization is applied for the contacts. We demonstrate the functionality of both two-dimensional and linear detector arrays and show possible applications such as NIR cameras or NIR spectrometers.

@article{Oehme_2022, abstract = {Due to the development of cost-efficient detector technologies in the NIR (Near Infrared), new areas of application are constantly being addressed. This affects autonomous driving, where LiDAR (Light Detection and Ranging) systems with better eye safety are being developed, as well as low-cost night vision cameras. Another area of application is NIR spectroscopy, e.g. in the areas of food monitoring, environmental research or medical technology. The increasing need for portable, low-cost analysis devices, for example for "on-site" measurements or for everyday life, is driving the development of highly miniaturized and low-cost lab-on-a-chip systems. The NIR detectors and NIR cameras available on the market are primarily based on materials from group III/V compound semiconductors, e.g. InGaAs. However, the CMOS (Complementary Metal Oxide Semiconductor) standard process cannot be used for the production of this technology, which significantly increases the cost factor and thus limits its use on the market. A promising alternative is offered by group IV based detectors, in particular Ge and GeSn detectors, which can be monolithically integrated on a Si substrate. As a result, such detector systems can be processed much more cost-efficiently with CMOS compatible standard technology. The NIR absorption properties are also comparable to III/V components. This paper reports on the monolithic integration of Ge and GeSn detector arrays on Si substrates for the realization of a camera system. The entire system consists of a photonic chip, a readout chip and a standard microcontroller, which is connected to a laptop via USB. The SNR (signal-to-noise ratio) is an important parameter for such an integrated system. The quantum efficiency of each individual pixel sensor has to be maximized and a high fill factor per pixel is aimed for. A particularly high fill factor is achieved here with optical light coupling via the substrate back-side, since the front-side metallization does not interfere with the optical coupling area. Furthermore, the metallization acts then as a mirror, the light thus passes through the absorption area twice and leads to a higher quantum efficiency. However, the main obstacle of Ge and GeSn, compared to III/V devices, is the higher intrinsic charge carrier concentration, which leads to a significantly higher dark current. A possible solution is the zero bias operation of the detector at the expected dark current minimum. The dark current is 3 orders of magnitude smaller at 0 V compared to an operating point at -1 V. Another criterion for the circuit is that a signal range or photocurrent supports a wide dynamic range (between nA and µA). For this purpose, the photocurrent is fed into the evaluation electronics via a triple cascaded current mirror. The measured value is output to a 12-bit ADC (Analog Digital Converter) integrated in the microcontroller via a current/voltage converter, two buffers and a sample hold element. With the help of additional multiplexers, the circuit can be used to read out several detectors and thus address a pixel matrix. We report on the fabrication of the photonic chip, which is carried out using CMOS compatible processes and MEMS (Micro-Electro-Mechanical System) processes in combination with an epitaxial growth of the active device structures. The photonic chip is based on 150 mm Si substrates, which were prepared first with multiple ion implantation steps. The active pin detector layers, consisting of Si and Ge or GeSn, were grown by means of molecular beam epitaxy. Afterwards, deep trenches were now etched between the detectors in a MEMS process to minimize crosstalk between neighboring pixels. The detectors were structured then using CMOS processes, and the backside is polished or structured. Finally, a two layer frontside-metallization is applied for the contacts. We demonstrate the functionality of both two-dimensional and linear detector arrays and show possible applications such as NIR cameras or NIR spectrometers.}, added-at = {2023-01-12T10:56:31.000+0100}, author = {Oehme, Michael and Yu, Zili and Wanitzek, Maurice and Epple, Steffen and Schad, Lena and Hack, Michael and Burghartz, Joachim and Schwarz, Daniel and Kaschel, Mathias}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2bcb4089b8bff0a7277d15919e4dc422a/ihtpublikation}, description = {Monolithic Integration of Gesn on Si for IR Camera Demonstration - IOPscience}, doi = {10.1149/MA2022-02321169mtgabs}, interhash = {2d1558c988cb60608aab2d82d8c9eb3c}, intrahash = {bcb4089b8bff0a7277d15919e4dc422a}, journal = {ECS Meeting Abstracts}, keywords = {iht professional_meetings}, month = oct, number = 32, pages = 1169, publisher = {The Electrochemical Society, Inc.}, timestamp = {2023-01-12T09:56:31.000+0100}, title = {Monolithic Integration of Gesn on Si for IR Camera Demonstration}, url = {https://dx.doi.org/10.1149/MA2022-02321169mtgabs}, volume = {MA2022-02}, year = 2022 }