%0 Journal Article %1 journals/tvlsi/NainC11 %A Nain, Rajeev K. %A Chrzanowska-Jeske, Malgorzata %D 2011 %J IEEE Trans. VLSI Syst. %K dblp %N 9 %P 1667-1680 %T Fast Placement-Aware 3-D Floorplanning Using Vertical Constraints on Sequence Pairs. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi19.html#NainC11 %V 19

@article{journals/tvlsi/NainC11, added-at = {2011-08-08T00:00:00.000+0200}, author = {Nain, Rajeev K. and Chrzanowska-Jeske, Malgorzata}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2b2e4bc9e1e40cd67366bb012fea928f3/dblp}, ee = {http://dx.doi.org/10.1109/TVLSI.2010.2055247}, interhash = {299405acc2b21e989358d4f47edbfbfc}, intrahash = {b2e4bc9e1e40cd67366bb012fea928f3}, journal = {IEEE Trans. VLSI Syst.}, keywords = {dblp}, number = 9, pages = {1667-1680}, timestamp = {2016-02-02T02:13:45.000+0100}, title = {Fast Placement-Aware 3-D Floorplanning Using Vertical Constraints on Sequence Pairs.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi19.html#NainC11}, volume = 19, year = 2011 }