An approach towards high speed current mode based SAR ADCs is presented in this paper. The main focus is placed on the design of a high-speed high-linearity transconductance (Gm) stage for operation in a current based SAR ADC. The Gm stage converts the input voltage to a current which is then processed in a current based binary search algorithm SAR loop. Here, for high speed operation, large transconductance values are needed. Additionally, achieving high linearity over a wide input range requires linearization techniques, which increase the hardware effort and reduce the power efficiency. Thus, settling speed and linearity are the key determining factors for the design of a high-speed high-linearity Gm stage in a current based SAR ADC. Additionally, this paper presents an initial investigation of the Gm stage current settling under linear load. The theoretical analysis is compared against a schematic level implementation in a 1.2 V 90 nm CMOS technology. This Gm stage implementation is designed for an overall resolution of 10 bit in the current based SAR ADC over a Nyquist band from DC to 100 MHz.
%0 Conference Paper
%1 7049940
%A Elkafrawy, A.
%A AlMarashli, A.
%A Ritter, R.
%A Anders, J.
%A Ortmanns, M.
%B 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS)
%D 2014
%K SAR ADC from:jens.anders
%P 136-139
%R 10.1109/ICECS.2014.7049940
%T Design of a high linearity Gm stage for a high speed current mode SAR ADC
%U https://ieeexplore.ieee.org/document/7049940/
%X An approach towards high speed current mode based SAR ADCs is presented in this paper. The main focus is placed on the design of a high-speed high-linearity transconductance (Gm) stage for operation in a current based SAR ADC. The Gm stage converts the input voltage to a current which is then processed in a current based binary search algorithm SAR loop. Here, for high speed operation, large transconductance values are needed. Additionally, achieving high linearity over a wide input range requires linearization techniques, which increase the hardware effort and reduce the power efficiency. Thus, settling speed and linearity are the key determining factors for the design of a high-speed high-linearity Gm stage in a current based SAR ADC. Additionally, this paper presents an initial investigation of the Gm stage current settling under linear load. The theoretical analysis is compared against a schematic level implementation in a 1.2 V 90 nm CMOS technology. This Gm stage implementation is designed for an overall resolution of 10 bit in the current based SAR ADC over a Nyquist band from DC to 100 MHz.
@inproceedings{7049940,
abstract = {An approach towards high speed current mode based SAR ADCs is presented in this paper. The main focus is placed on the design of a high-speed high-linearity transconductance (Gm) stage for operation in a current based SAR ADC. The Gm stage converts the input voltage to a current which is then processed in a current based binary search algorithm SAR loop. Here, for high speed operation, large transconductance values are needed. Additionally, achieving high linearity over a wide input range requires linearization techniques, which increase the hardware effort and reduce the power efficiency. Thus, settling speed and linearity are the key determining factors for the design of a high-speed high-linearity Gm stage in a current based SAR ADC. Additionally, this paper presents an initial investigation of the Gm stage current settling under linear load. The theoretical analysis is compared against a schematic level implementation in a 1.2 V 90 nm CMOS technology. This Gm stage implementation is designed for an overall resolution of 10 bit in the current based SAR ADC over a Nyquist band from DC to 100 MHz.},
added-at = {2020-10-12T15:54:41.000+0200},
author = {{Elkafrawy}, A. and {AlMarashli}, A. and {Ritter}, R. and {Anders}, J. and {Ortmanns}, M.},
biburl = {https://puma.ub.uni-stuttgart.de/bibtex/277aa1be69acaa5743c8a41f16b7895d3/iis},
booktitle = {2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS)},
doi = {10.1109/ICECS.2014.7049940},
interhash = {a9aee406449e44b9aa6912dab3e03162},
intrahash = {77aa1be69acaa5743c8a41f16b7895d3},
keywords = {SAR ADC from:jens.anders},
month = dec,
pages = {136-139},
timestamp = {2020-10-12T13:54:41.000+0200},
title = {Design of a high linearity Gm stage for a high speed current mode SAR ADC},
url = {https://ieeexplore.ieee.org/document/7049940/},
year = 2014
}
