Ultra-high speed and bandwidth ADCs are necessary for communication systems that apply spectral efficient modulation formats to achieve date rates of 100Gbit/s and beyond. These ADCs must have a high absolute input bandwidth, a high sampling speed and good linearity. A key component of these ADCs is the analog front-end section between the analog signal input and the quantizer. This contribution shows some different methods to implement such ultra-broadband ADC front-ends. The first method, suitable for medium-resolution ADCs, is to use a track-hold-less analog front-end with a high-bandwidth input transconductor and a travelling-wave structure for the comparators of the quantizer. This input structure ensures proper alignment between the signal and the clock at all comparators. The method is illustrated by a 40GS/s 4-bit single-core flash-type BiCMOS ADC. For higher resolution ADCs, a linear front-end track-hold circuit is necessary, which can be implemented using a voltage-mode or a current-mode approach. The voltage-mode approach is exemplified by a 12GS/s BiCMOS circuit with track-mode masking and high SFDR in the first and second Nyquist band. The current mode approach is shown by a 25GS/s BiCMOS circuit with a 1dB input bandwidth of 40GHz. To reach even higher sampling rates, the analog input samples can be de-interleaved to several quantizers by means of an analog demultiplexer (ADeMUX). This is illustrated by a current-mode 1-to-4 ADeMUX implemented in BiCMOS running at 112GS/s.
Workshop WFC - Enabling technologies for efficient ultra-high speed wireless communication systems towards 100 Gb/s, IEEE International Microwave Symposium (IMS)
year
2021
file
Grözing, Du et al 2021 - High-Bandwidth Analog-to-Digital-Converter Front-Ends in SiGe-BiCMOS:L\:\\Intranet\\Veroeffentlichungen\\Projects\\INT\\Citavi Attachments\\Grözing, Du et al 2021 - High-Bandwidth Analog-to-Digital-Converter Front-Ends in SiGe-BiCMOS.pdf:pdf
%0 Generic
%1 Grozing.2021
%A Grözing, Markus
%A Du, Xuan-Quang
%A Thomas, Philipp
%A Berroth, Manfred
%B Workshop WFC - Enabling technologies for efficient ultra-high speed wireless communication systems towards 100 Gb/s, IEEE International Microwave Symposium (IMS)
%D 2021
%K Conference int pr-taranto
%T High-Bandwidth Analog-to-Digital-Converter Front-Ends in SiGe-BiCMOS Technology
%X Ultra-high speed and bandwidth ADCs are necessary for communication systems that apply spectral efficient modulation formats to achieve date rates of 100Gbit/s and beyond. These ADCs must have a high absolute input bandwidth, a high sampling speed and good linearity. A key component of these ADCs is the analog front-end section between the analog signal input and the quantizer. This contribution shows some different methods to implement such ultra-broadband ADC front-ends. The first method, suitable for medium-resolution ADCs, is to use a track-hold-less analog front-end with a high-bandwidth input transconductor and a travelling-wave structure for the comparators of the quantizer. This input structure ensures proper alignment between the signal and the clock at all comparators. The method is illustrated by a 40GS/s 4-bit single-core flash-type BiCMOS ADC. For higher resolution ADCs, a linear front-end track-hold circuit is necessary, which can be implemented using a voltage-mode or a current-mode approach. The voltage-mode approach is exemplified by a 12GS/s BiCMOS circuit with track-mode masking and high SFDR in the first and second Nyquist band. The current mode approach is shown by a 25GS/s BiCMOS circuit with a 1dB input bandwidth of 40GHz. To reach even higher sampling rates, the analog input samples can be de-interleaved to several quantizers by means of an analog demultiplexer (ADeMUX). This is illustrated by a current-mode 1-to-4 ADeMUX implemented in BiCMOS running at 112GS/s.
@conference{Grozing.2021,
abstract = {Ultra-high speed and bandwidth ADCs are necessary for communication systems that apply spectral efficient modulation formats to achieve date rates of 100Gbit/s and beyond. These ADCs must have a high absolute input bandwidth, a high sampling speed and good linearity. A key component of these ADCs is the analog front-end section between the analog signal input and the quantizer. This contribution shows some different methods to implement such ultra-broadband ADC front-ends. The first method, suitable for medium-resolution ADCs, is to use a track-hold-less analog front-end with a high-bandwidth input transconductor and a travelling-wave structure for the comparators of the quantizer. This input structure ensures proper alignment between the signal and the clock at all comparators. The method is illustrated by a 40GS/s 4-bit single-core flash-type BiCMOS ADC. For higher resolution ADCs, a linear front-end track-hold circuit is necessary, which can be implemented using a voltage-mode or a current-mode approach. The voltage-mode approach is exemplified by a 12GS/s BiCMOS circuit with track-mode masking and high SFDR in the first and second Nyquist band. The current mode approach is shown by a 25GS/s BiCMOS circuit with a 1dB input bandwidth of 40GHz. To reach even higher sampling rates, the analog input samples can be de-interleaved to several quantizers by means of an analog demultiplexer (ADeMUX). This is illustrated by a current-mode 1-to-4 ADeMUX implemented in BiCMOS running at 112GS/s.},
added-at = {2021-06-24T08:26:48.000+0200},
author = {Grözing, Markus and Du, Xuan-Quang and Thomas, Philipp and Berroth, Manfred},
biburl = {https://puma.ub.uni-stuttgart.de/bibtex/239b7be8a51073fa5eac76b3cd9ecde5d/wolfgangvogel},
booktitle = {Workshop WFC - Enabling technologies for efficient ultra-high speed wireless communication systems towards 100 Gb/s, IEEE International Microwave Symposium (IMS)},
file = {Grözing, Du et al 2021 - High-Bandwidth Analog-to-Digital-Converter Front-Ends in SiGe-BiCMOS:L\:\\Intranet\\Veroeffentlichungen\\Projects\\INT\\Citavi Attachments\\Grözing, Du et al 2021 - High-Bandwidth Analog-to-Digital-Converter Front-Ends in SiGe-BiCMOS.pdf:pdf},
interhash = {dc17d139dd1b45c76c0eee3199c4d31c},
intrahash = {39b7be8a51073fa5eac76b3cd9ecde5d},
keywords = {Conference int pr-taranto},
timestamp = {2021-06-24T06:28:35.000+0200},
title = {High-Bandwidth Analog-to-Digital-Converter Front-Ends in SiGe-BiCMOS Technology},
year = 2021
}