%0 Journal Article %1 Thomas.2021 %A Thomas, Philipp %A Tannert, Tobias %A Grözing, Markus %A Berroth, Manfred %A Hu, Qian %A Buchali, Fred %D 2021 %J IEEE Journal of Solid State Circuits %K Journal int pr-taranto %N 9 %P 2611--2623 %R 10.1109/JSSC.2021.3100677 %T 1-to-4 Analog Demultiplexer with up to 128 GS/s for Interleaving of Bandwidth-Limited Digitizers in Wireline and Optical Receivers %V 56 %X Today’s ultra-wideband optical equipment enables fiber-based data links with up to 1.6 Tbit/s per wavelength at a symbol rate of 128 Gbaud. However, high input signal path losses need to be overcome in commercial products when the digitizers are integrated with the digital signal processor in a deep-submicrometer FinFET-CMOS transceiver application specific integrated circuit (ASIC). This currently limits the analog-to-digital converter (ADC) sampling rate and the detectable link symbol rate to 97 GS/s and 66 Gbaud, respectively. Four of these bandwidth-limited ADCs can be time-interleaved with the presented analog 1-to-4 demultiplexer front end in a SiGe-BiCMOS technology that allows high bandwidths with transistor cutoff frequencies above 300 GHz. The sampling front end effectively divides the necessary ADC bandwidth by the time-interleaving factor, enabling the detection of ultra-high symbol rates of up to 128 Gbaud with only 16-GHz bandwidth requirement for the four ADCs. At these frequencies, subsequent circuits and chip interconnects exhibit significantly lower signal path losses than at 64 GHz—half the symbol rate—and therefore require only a reduced processing power for channel equalization in the analog and digital domain. We demonstrate sampling operation with a large-signal 3-dB bandwidth of 36 GHz and a 6-dB bandwidth of 50 GHz at 128 GS/s in an experimental testbed, as well as the reception of 128-Gbit/s NRZ/OOK and 256-Gbit/s PAM4 signals. The linearity reaches more than 3-bit effective number of bits (ENOB) with a sinusoidal input signal of 500 mV pp on each of the four output channels. The power consumption is equivalent to a sampling efficiency of 20 pJ/sample, narrowing the gap to slower CMOS solutions and enabling cost-efficient coherent optical links with up to 1 Tbit/s.

@article{Thomas.2021, abstract = {Today’s ultra-wideband optical equipment enables fiber-based data links with up to 1.6 Tbit/s per wavelength at a symbol rate of 128 Gbaud. However, high input signal path losses need to be overcome in commercial products when the digitizers are integrated with the digital signal processor in a deep-submicrometer FinFET-CMOS transceiver application specific integrated circuit (ASIC). This currently limits the analog-to-digital converter (ADC) sampling rate and the detectable link symbol rate to 97 GS/s and 66 Gbaud, respectively. Four of these bandwidth-limited ADCs can be time-interleaved with the presented analog 1-to-4 demultiplexer front end in a SiGe-BiCMOS technology that allows high bandwidths with transistor cutoff frequencies above 300 GHz. The sampling front end effectively divides the necessary ADC bandwidth by the time-interleaving factor, enabling the detection of ultra-high symbol rates of up to 128 Gbaud with only 16-GHz bandwidth requirement for the four ADCs. At these frequencies, subsequent circuits and chip interconnects exhibit significantly lower signal path losses than at 64 GHz—half the symbol rate—and therefore require only a reduced processing power for channel equalization in the analog and digital domain. We demonstrate sampling operation with a large-signal 3-dB bandwidth of 36 GHz and a 6-dB bandwidth of 50 GHz at 128 GS/s in an experimental testbed, as well as the reception of 128-Gbit/s NRZ/OOK and 256-Gbit/s PAM4 signals. The linearity reaches more than 3-bit effective number of bits (ENOB) with a sinusoidal input signal of 500 mV pp on each of the four output channels. The power consumption is equivalent to a sampling efficiency of 20 pJ/sample, narrowing the gap to slower CMOS solutions and enabling cost-efficient coherent optical links with up to 1 Tbit/s.}, added-at = {2021-09-27T09:17:19.000+0200}, author = {Thomas, Philipp and Tannert, Tobias and Grözing, Markus and Berroth, Manfred and Hu, Qian and Buchali, Fred}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/237de062caa2b0ac9a13e9a770517725e/wolfgangvogel}, doi = {10.1109/JSSC.2021.3100677}, interhash = {fcd26c8fe1b9fbba8c45478fa1f9d93f}, intrahash = {37de062caa2b0ac9a13e9a770517725e}, journal = {IEEE Journal of Solid State Circuits}, keywords = {Journal int pr-taranto}, number = 9, pages = {2611--2623}, timestamp = {2021-09-27T07:17:19.000+0200}, title = {1-to-4 Analog Demultiplexer with up to 128 GS/s for Interleaving of Bandwidth-Limited Digitizers in Wireline and Optical Receivers}, volume = 56, year = 2021 }