%0 Journal Article %1 journals/jssc/KangYKCLBKKKCJJ22 %A Kang, Jihyo %A Yang, Jaehyeok %A Kim, Kyunghoon %A Chae, Joo-Hyung %A Lee, Gang-Sik %A Byeon, Sang-Yeon %A Kim, Boram %A Kim, Dong-Hyun %A Kim, Youngtaek %A Cho, Yeongmuk %A Ji, Junghwan %A Jeong, Sera %A Cha, Jaehoon %A Park, Minsoo %A Kim, Hongdeuk %A Park, Sijun %A Kim, Sunho %A Jung, Hae-Kang %A Jang, Jieun %A Lee, Sangkwon %A Kim, Hyungsoo %A Cho, Joo-Hwan %A Chun, Junhyun %A Cha, Seon-Yong %D 2022 %J IEEE J. Solid State Circuits %K dblp %N 1 %P 212-223 %T A 24-Gb/s/Pin 8-Gb GDDR6 With a Half-Rate Daisy-Chain-Based Clocking Architecture and I/O Circuitry for Low-Noise Operation. %U http://dblp.uni-trier.de/db/journals/jssc/jssc57.html#KangYKCLBKKKCJJ22 %V 57

@article{journals/jssc/KangYKCLBKKKCJJ22, added-at = {2022-01-08T00:00:00.000+0100}, author = {Kang, Jihyo and Yang, Jaehyeok and Kim, Kyunghoon and Chae, Joo-Hyung and Lee, Gang-Sik and Byeon, Sang-Yeon and Kim, Boram and Kim, Dong-Hyun and Kim, Youngtaek and Cho, Yeongmuk and Ji, Junghwan and Jeong, Sera and Cha, Jaehoon and Park, Minsoo and Kim, Hongdeuk and Park, Sijun and Kim, Sunho and Jung, Hae-Kang and Jang, Jieun and Lee, Sangkwon and Kim, Hyungsoo and Cho, Joo-Hwan and Chun, Junhyun and Cha, Seon-Yong}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2d0a710eb20feb98ea7ca1f98735fbba2/dblp}, ee = {https://doi.org/10.1109/JSSC.2021.3114205}, interhash = {f68146e0ffc378bdb268598b59cd5353}, intrahash = {d0a710eb20feb98ea7ca1f98735fbba2}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 1, pages = {212-223}, timestamp = {2022-03-01T06:21:56.000+0100}, title = {A 24-Gb/s/Pin 8-Gb GDDR6 With a Half-Rate Daisy-Chain-Based Clocking Architecture and I/O Circuitry for Low-Noise Operation.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc57.html#KangYKCLBKKKCJJ22}, volume = 57, year = 2022 }