%0 Conference Paper %1 conf/dsd/ChenCC01 %A Chen, Chichyang %A Chen, Liang-An %A Cheng, Jih-Ren %B DSD %D 2001 %I IEEE Computer Society %K dblp %P 346-353 %T Architectural Design of a Fast Floating-Point Multiplication-Add Fused Unit Using Signed-Digit Addition. %U http://dblp.uni-trier.de/db/conf/dsd/dsd2001.html#ChenCC01 %@ 0-7695-1239-9

@inproceedings{conf/dsd/ChenCC01, added-at = {2015-01-16T00:00:00.000+0100}, author = {Chen, Chichyang and Chen, Liang-An and Cheng, Jih-Ren}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/203058da4ad70d9a5eead11c6087feaf1/dblp}, booktitle = {DSD}, crossref = {conf/dsd/2001}, ee = {http://doi.ieeecomputersociety.org/10.1109/DSD.2001.952324}, interhash = {f6153360f63da22b550b211c44d383e9}, intrahash = {03058da4ad70d9a5eead11c6087feaf1}, isbn = {0-7695-1239-9}, keywords = {dblp}, pages = {346-353}, publisher = {IEEE Computer Society}, timestamp = {2016-02-02T12:38:30.000+0100}, title = {Architectural Design of a Fast Floating-Point Multiplication-Add Fused Unit Using Signed-Digit Addition.}, url = {http://dblp.uni-trier.de/db/conf/dsd/dsd2001.html#ChenCC01}, year = 2001 }