%0 Journal Article %1 journals/jpdc/LeeLKY13 %A Lee, Jaekyu %A Li, Si %A Kim, Hyesoon %A Yalamanchili, Sudhakar %D 2013 %J J. Parallel Distrib. Comput. %K dblp %N 12 %P 1525-1538 %T Design space exploration of on-chip ring interconnection for a CPU-GPU heterogeneous architecture. %U http://dblp.uni-trier.de/db/journals/jpdc/jpdc73.html#LeeLKY13 %V 73

@article{journals/jpdc/LeeLKY13, added-at = {2013-10-30T00:00:00.000+0100}, author = {Lee, Jaekyu and Li, Si and Kim, Hyesoon and Yalamanchili, Sudhakar}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2cb7db9d4604bac95e828247224e8ec9d/dblp}, ee = {http://dx.doi.org/10.1016/j.jpdc.2013.07.014}, interhash = {f06f2d7032d8463d60f70974334583eb}, intrahash = {cb7db9d4604bac95e828247224e8ec9d}, journal = {J. Parallel Distrib. Comput.}, keywords = {dblp}, number = 12, pages = {1525-1538}, timestamp = {2016-02-02T01:56:50.000+0100}, title = {Design space exploration of on-chip ring interconnection for a CPU-GPU heterogeneous architecture.}, url = {http://dblp.uni-trier.de/db/journals/jpdc/jpdc73.html#LeeLKY13}, volume = 73, year = 2013 }