%0 Journal Article %1 journals/tvlsi/WangXZW16 %A Wang, Jian %A Xiong, Chunlin %A Zhang, Kangli %A Wei, Jibo %D 2016 %J IEEE Trans. VLSI Syst. %K dblp %N 1 %P 67-78 %T A Mixed-Decimation MDF Architecture for Radix-2k Parallel FFT. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi24.html#WangXZW16 %V 24

@article{journals/tvlsi/WangXZW16, added-at = {2016-01-07T00:00:00.000+0100}, author = {Wang, Jian and Xiong, Chunlin and Zhang, Kangli and Wei, Jibo}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/252624121f4030b858898bcf8073560fe/dblp}, ee = {http://dx.doi.org/10.1109/TVLSI.2015.2402207}, interhash = {eed599fcee7e5afdae690091167b16a6}, intrahash = {52624121f4030b858898bcf8073560fe}, journal = {IEEE Trans. VLSI Syst.}, keywords = {dblp}, number = 1, pages = {67-78}, timestamp = {2016-02-02T02:13:48.000+0100}, title = {A Mixed-Decimation MDF Architecture for Radix-2k Parallel FFT.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi24.html#WangXZW16}, volume = 24, year = 2016 }