%0 Conference Paper %1 conf/iscas/CalhounKMW09 %A Calhoun, Benton H. %A Khanna, Sudhanshu %A Mann, Randy W. %A Wang, Jiajing %B ISCAS %D 2009 %I IEEE %K dblp %P 2541-2544 %T Sub-threshold Circuit Design with Shrinking CMOS Devices. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2009.html#CalhounKMW09 %@ 978-1-4244-3828-0

@inproceedings{conf/iscas/CalhounKMW09, added-at = {2011-06-28T00:00:00.000+0200}, author = {Calhoun, Benton H. and Khanna, Sudhanshu and Mann, Randy W. and Wang, Jiajing}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2b88a84d204d76d932df5202e0c784577/dblp}, booktitle = {ISCAS}, crossref = {conf/iscas/2009}, ee = {http://dx.doi.org/10.1109/ISCAS.2009.5118319}, interhash = {e9fa935611993a77dbd8b8ddd9d8cbb4}, intrahash = {b88a84d204d76d932df5202e0c784577}, isbn = {978-1-4244-3828-0}, keywords = {dblp}, pages = {2541-2544}, publisher = {IEEE}, timestamp = {2016-05-21T09:33:21.000+0200}, title = {Sub-threshold Circuit Design with Shrinking CMOS Devices.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2009.html#CalhounKMW09}, year = 2009 }