%0 Conference Paper %1 conf/ispass/0002R14 %A Abel, Andreas %A Reineke, Jan %B ISPASS %D 2014 %I IEEE Computer Society %K dblp %P 141-142 %T Reverse engineering of cache replacement policies in Intel microprocessors and their evaluation. %U http://dblp.uni-trier.de/db/conf/ispass/ispass2014.html#0002R14 %@ 978-1-4799-3604-5

@inproceedings{conf/ispass/0002R14, added-at = {2015-05-04T00:00:00.000+0200}, author = {Abel, Andreas and Reineke, Jan}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2353cb7bbb4804bd0640a223aba6ad455/dblp}, booktitle = {ISPASS}, crossref = {conf/ispass/2014}, ee = {http://doi.ieeecomputersociety.org/10.1109/ISPASS.2014.6844475}, interhash = {e3afa75de005c88b1065d77eff9dc346}, intrahash = {353cb7bbb4804bd0640a223aba6ad455}, isbn = {978-1-4799-3604-5}, keywords = {dblp}, pages = {141-142}, publisher = {IEEE Computer Society}, timestamp = {2016-02-02T12:10:31.000+0100}, title = {Reverse engineering of cache replacement policies in Intel microprocessors and their evaluation.}, url = {http://dblp.uni-trier.de/db/conf/ispass/ispass2014.html#0002R14}, year = 2014 }