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%0 Conference Paper
%1 conf/iscas/JainSSDC99
%A Jain, Vijay K.
%A Shrivastava, S.
%A Snider, A. D.
%A Damerow, D.
%A Chester, D.
%B ISCAS (6)
%D 1999
%I IEEE
%K dblp
%P 509-514
%T Hardware implementation of a nonlinear processor.
%U http://dblp.uni-trier.de/db/conf/iscas/iscas1999-6.html#JainSSDC99
%@ 0-7803-5471-0
@inproceedings{conf/iscas/JainSSDC99,
added-at = {2016-05-20T00:00:00.000+0200},
author = {Jain, Vijay K. and Shrivastava, S. and Snider, A. D. and Damerow, D. and Chester, D.},
biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2d50202dbbc284731e73788c17e767754/dblp},
booktitle = {ISCAS (6)},
crossref = {conf/iscas/1999},
ee = {http://dx.doi.org/10.1109/ISCAS.1999.780206},
interhash = {de458265e1f1402cdd57f19ee31f5c5e},
intrahash = {d50202dbbc284731e73788c17e767754},
isbn = {0-7803-5471-0},
keywords = {dblp},
pages = {509-514},
publisher = {IEEE},
timestamp = {2016-05-21T09:32:41.000+0200},
title = {Hardware implementation of a nonlinear processor.},
url = {http://dblp.uni-trier.de/db/conf/iscas/iscas1999-6.html#JainSSDC99},
year = 1999
}