%0 Conference Paper %1 conf/vlsid/JainA06 %A Jain, Sanjeev K. %A Agarwal, Pankaj %B VLSI Design %D 2006 %I IEEE Computer Society %K dblp %P 495-498 %T A Low Leakage and SNM Free SRAM Cell Design in Deep Sub Micron CMOS Technology. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2006.html#JainA06 %@ 0-7695-2502-4

@inproceedings{conf/vlsid/JainA06, added-at = {2017-05-23T00:00:00.000+0200}, author = {Jain, Sanjeev K. and Agarwal, Pankaj}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2d4da5c945f5781cba341d1210f048546/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2006}, ee = {http://doi.ieeecomputersociety.org/10.1109/VLSID.2006.12}, interhash = {dcc2296eb1f9616f6ef8643c1279def2}, intrahash = {d4da5c945f5781cba341d1210f048546}, isbn = {0-7695-2502-4}, keywords = {dblp}, pages = {495-498}, publisher = {IEEE Computer Society}, timestamp = {2019-09-27T18:12:23.000+0200}, title = {A Low Leakage and SNM Free SRAM Cell Design in Deep Sub Micron CMOS Technology.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2006.html#JainA06}, year = 2006 }