%0 Journal Article %1 journals/tc/MetraOMT12 %A Metra, Cecilia %A Omaña, Martin %A Mak, T. M. %A Tam, Simon %D 2012 %J IEEE Trans. Computers %K dblp %N 4 %P 448-457 %T New Design for Testability Approach for Clock Fault Testing. %U http://dblp.uni-trier.de/db/journals/tc/tc61.html#MetraOMT12 %V 61

@article{journals/tc/MetraOMT12, added-at = {2015-12-22T00:00:00.000+0100}, author = {Metra, Cecilia and Omaña, Martin and Mak, T. M. and Tam, Simon}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2eaa394dd3ad4f9ba5db9451ae53cb802/dblp}, ee = {http://doi.ieeecomputersociety.org/10.1109/TC.2011.59}, interhash = {d79f18e02d130ef43f3ec1be3244805b}, intrahash = {eaa394dd3ad4f9ba5db9451ae53cb802}, journal = {IEEE Trans. Computers}, keywords = {dblp}, number = 4, pages = {448-457}, timestamp = {2016-02-02T02:34:43.000+0100}, title = {New Design for Testability Approach for Clock Fault Testing.}, url = {http://dblp.uni-trier.de/db/journals/tc/tc61.html#MetraOMT12}, volume = 61, year = 2012 }