Inproceedings,

Sensitivity of a 20-GS/s InP DHBT latched comparator

, , , , , and .
2010 22nd International Conference on Indium Phosphide and Related Materials (IPRM), page 1-4. (May 2010)
DOI: 10.1109/ICIPRM.2010.5515962

Abstract

We present simulations and measurements of the sensitivity of a master-slave emitter-coupled logic (ECL) latched comparator implemented in an InP/GaInAs DHBT technology. The circuit exhibited simulated and experimental sensitivities of 11.5 mV and 17 mV, respectively, at a clock rate of 20 GHz, with no preamplifier.

Tags

Users

  • @ingmarkallfass

Comments and Reviews