%0 Journal Article %1 journals/jssc/YoshiokaSDTI15 %A Yoshioka, Kentaro %A Saito, Ryo %A Danjo, Takumi %A Tsukamoto, Sanroku %A Ishikuro, Hiroki %D 2015 %J J. Solid-State Circuits %K dblp %N 4 %P 932-945 %T Dynamic Architecture and Frequency Scaling in 0.8-1.2 GS/s 7 b Subranging ADC. %U http://dblp.uni-trier.de/db/journals/jssc/jssc50.html#YoshiokaSDTI15 %V 50

@article{journals/jssc/YoshiokaSDTI15, added-at = {2015-04-09T00:00:00.000+0200}, author = {Yoshioka, Kentaro and Saito, Ryo and Danjo, Takumi and Tsukamoto, Sanroku and Ishikuro, Hiroki}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2a0ab0d8e0d49853ec4341aa96e6a9fd1/dblp}, ee = {http://dx.doi.org/10.1109/JSSC.2014.2387191}, interhash = {bd643ac986ba80bd03f23cbabb68c191}, intrahash = {a0ab0d8e0d49853ec4341aa96e6a9fd1}, journal = {J. Solid-State Circuits}, keywords = {dblp}, number = 4, pages = {932-945}, timestamp = {2016-02-02T09:37:01.000+0100}, title = {Dynamic Architecture and Frequency Scaling in 0.8-1.2 GS/s 7 b Subranging ADC.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc50.html#YoshiokaSDTI15}, volume = 50, year = 2015 }