%0 Conference Paper %1 conf/vlsic/HuangK19 %A Huang, Hung-Yi %A Kuo, Tai-Haur %B VLSI Circuits %D 2019 %I IEEE %K dblp %P 136- %T A 0.07mm2 210mW Single-1.1V-Supply 14-bit 10GS/s DAC with Concentric Parallelogram Routing and Output Impedance Compensation. %U http://dblp.uni-trier.de/db/conf/vlsic/vlsic2019.html#HuangK19 %@ 978-4-86348-720-8

@inproceedings{conf/vlsic/HuangK19, added-at = {2019-08-05T00:00:00.000+0200}, author = {Huang, Hung-Yi and Kuo, Tai-Haur}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/26de35687a3241cb94a8b93c9e291df7a/dblp}, booktitle = {VLSI Circuits}, crossref = {conf/vlsic/2019}, ee = {https://doi.org/10.23919/VLSIC.2019.8778067}, interhash = {bcbbb5628815a59e690ea435bbce1170}, intrahash = {6de35687a3241cb94a8b93c9e291df7a}, isbn = {978-4-86348-720-8}, keywords = {dblp}, pages = {136-}, publisher = {IEEE}, timestamp = {2019-09-27T16:36:31.000+0200}, title = {A 0.07mm2 210mW Single-1.1V-Supply 14-bit 10GS/s DAC with Concentric Parallelogram Routing and Output Impedance Compensation.}, url = {http://dblp.uni-trier.de/db/conf/vlsic/vlsic2019.html#HuangK19}, year = 2019 }