%0 Journal Article %1 journals/vlsisp/MaragosSLKDBAS17 %A Maragos, Konstantinos %A Spatharakis, Christos %A Lentaris, George %A Kontzilas, Panagiotis %A Dris, Stefanos %A Bakopoulos, Paraskevas %A Avramopoulos, Hercules %A Soudris, Dimitrios %D 2017 %J Signal Processing Systems %K dblp %N 2 %P 107-125 %T A Flexible, High-Performance FPGA Implementation of a Feed-Forward Equalizer for Optical Interconnects up to 112 Gb/s. %U http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp88.html#MaragosSLKDBAS17 %V 88

@article{journals/vlsisp/MaragosSLKDBAS17, added-at = {2018-11-30T00:00:00.000+0100}, author = {Maragos, Konstantinos and Spatharakis, Christos and Lentaris, George and Kontzilas, Panagiotis and Dris, Stefanos and Bakopoulos, Paraskevas and Avramopoulos, Hercules and Soudris, Dimitrios}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2c370d1115b2c7f2a115bdd75693b5327/dblp}, ee = {https://doi.org/10.1007/s11265-016-1201-y}, interhash = {b59136cccc32b0f6b4bcd0de75cd7714}, intrahash = {c370d1115b2c7f2a115bdd75693b5327}, journal = {Signal Processing Systems}, keywords = {dblp}, number = 2, pages = {107-125}, timestamp = {2019-09-27T11:06:23.000+0200}, title = {A Flexible, High-Performance FPGA Implementation of a Feed-Forward Equalizer for Optical Interconnects up to 112 Gb/s.}, url = {http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp88.html#MaragosSLKDBAS17}, volume = 88, year = 2017 }