Please log in to take part in the discussion (add own reviews or comments).
Cite this publication
More citation styles
- please select -
%0 Conference Paper
%1 conf/asicon/LiaoCWLNYC15
%A Liao, Nan
%A Cui, Xiaoxin
%A Wang, Tian
%A Liao, Kai
%A Ni, Yewen
%A Yu, Dunshan
%A Cui, Xiaole
%B ASICON
%D 2015
%I IEEE
%K dblp
%P 1-4
%T A high-efficient and accurate fault model aiming at FPGA-based AES cryptographic applications.
%U http://dblp.uni-trier.de/db/conf/asicon/asicon2015.html#LiaoCWLNYC15
%@ 978-1-4799-8485-5
@inproceedings{conf/asicon/LiaoCWLNYC15,
added-at = {2018-07-17T00:00:00.000+0200},
author = {Liao, Nan and Cui, Xiaoxin and Wang, Tian and Liao, Kai and Ni, Yewen and Yu, Dunshan and Cui, Xiaole},
biburl = {https://puma.ub.uni-stuttgart.de/bibtex/23db1c73584aa65a61481cf44818b4d09/dblp},
booktitle = {ASICON},
crossref = {conf/asicon/2015},
ee = {https://doi.org/10.1109/ASICON.2015.7517030},
interhash = {b528723822da61cce315fd7ad6779729},
intrahash = {3db1c73584aa65a61481cf44818b4d09},
isbn = {978-1-4799-8485-5},
keywords = {dblp},
pages = {1-4},
publisher = {IEEE},
timestamp = {2019-09-27T17:19:01.000+0200},
title = {A high-efficient and accurate fault model aiming at FPGA-based AES cryptographic applications.},
url = {http://dblp.uni-trier.de/db/conf/asicon/asicon2015.html#LiaoCWLNYC15},
year = 2015
}