%0 Conference Paper %1 conf/date/LiYLJGWL18a %A Li, Jiajun %A Yan, Guihai %A Lu, Wenyan %A Jiang, Shuhao %A Gong, Shijun %A Wu, Jingya %A Li, Xiaowei %B DATE %D 2018 %E Madsen, Jan %E Coskun, Ayse K. %I IEEE %K dblp %P 343-348 %T SmartShuttle: Optimizing off-chip memory accesses for deep learning accelerators. %U http://dblp.uni-trier.de/db/conf/date/date2018.html#LiYLJGWL18a %@ 978-3-9819263-0-9

@inproceedings{conf/date/LiYLJGWL18a, added-at = {2019-01-17T00:00:00.000+0100}, author = {Li, Jiajun and Yan, Guihai and Lu, Wenyan and Jiang, Shuhao and Gong, Shijun and Wu, Jingya and Li, Xiaowei}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/22982db92b272180ff500924d7144a91c/dblp}, booktitle = {DATE}, crossref = {conf/date/2018}, editor = {Madsen, Jan and Coskun, Ayse K.}, ee = {https://doi.org/10.23919/DATE.2018.8342033}, interhash = {b39c712c89e95c3991e67a6a2c670268}, intrahash = {2982db92b272180ff500924d7144a91c}, isbn = {978-3-9819263-0-9}, keywords = {dblp}, pages = {343-348}, publisher = {IEEE}, timestamp = {2019-09-27T13:35:55.000+0200}, title = {SmartShuttle: Optimizing off-chip memory accesses for deep learning accelerators.}, url = {http://dblp.uni-trier.de/db/conf/date/date2018.html#LiYLJGWL18a}, year = 2018 }