%0 Conference Paper %1 conf/fpga/DaiNZ10 %A Dai, Zefu %A Ni, Nick %A Zhu, Jianwen %B FPGA %D 2010 %E Cheung, Peter Y. K. %E Wawrzynek, John %I ACM %K dblp %P 199-208 %T A 1 cycle-per-byte XML parsing accelerator. %U http://dblp.uni-trier.de/db/conf/fpga/fpga2010.html#DaiNZ10 %@ 978-1-60558-911-4

@inproceedings{conf/fpga/DaiNZ10, added-at = {2018-11-06T00:00:00.000+0100}, author = {Dai, Zefu and Ni, Nick and Zhu, Jianwen}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/265da161341ad6517a60ce9549600ad73/dblp}, booktitle = {FPGA}, crossref = {conf/fpga/2010}, editor = {Cheung, Peter Y. K. and Wawrzynek, John}, ee = {https://doi.org/10.1145/1723112.1723148}, interhash = {afeb91e1bc2fc0114648ed29443d62f3}, intrahash = {65da161341ad6517a60ce9549600ad73}, isbn = {978-1-60558-911-4}, keywords = {dblp}, pages = {199-208}, publisher = {ACM}, timestamp = {2019-09-27T13:25:46.000+0200}, title = {A 1 cycle-per-byte XML parsing accelerator.}, url = {http://dblp.uni-trier.de/db/conf/fpga/fpga2010.html#DaiNZ10}, year = 2010 }