%0 Journal Article %1 journals/jolpe/LiuS12 %A Liu, Yang %A Srivastava, Ashok %D 2012 %J J. Low Power Electronics %K dblp %N 3 %P 304-316 %T CMOS Phase-Locked Loop Circuits and Hot Carrier Effects. %U http://dblp.uni-trier.de/db/journals/jolpe/jolpe8.html#LiuS12 %V 8

@article{journals/jolpe/LiuS12, added-at = {2012-11-08T00:00:00.000+0100}, author = {Liu, Yang and Srivastava, Ashok}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/23b3354402710fb0189929b8301245021/dblp}, ee = {http://dx.doi.org/10.1166/jolpe.2012.1194}, interhash = {a8d7b4bea3f61ccbd8f6934b421d0d65}, intrahash = {3b3354402710fb0189929b8301245021}, journal = {J. Low Power Electronics}, keywords = {dblp}, number = 3, pages = {304-316}, timestamp = {2016-02-02T01:37:35.000+0100}, title = {CMOS Phase-Locked Loop Circuits and Hot Carrier Effects.}, url = {http://dblp.uni-trier.de/db/journals/jolpe/jolpe8.html#LiuS12}, volume = 8, year = 2012 }