%0 Conference Paper %1 conf/fpl/SiddharthaK14 %A Siddhartha, %A Kapre, Nachiket %B FPL %D 2014 %I IEEE %K dblp %P 1-4 %T Heterogeneous dataflow architectures for FPGA-based sparse LU factorization. %U http://dblp.uni-trier.de/db/conf/fpl/fpl2014.html#SiddharthaK14

@inproceedings{conf/fpl/SiddharthaK14, added-at = {2014-10-30T00:00:00.000+0100}, author = {Siddhartha and Kapre, Nachiket}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/23db092fbeb162cc07df223f88cba6fef/dblp}, booktitle = {FPL}, crossref = {conf/fpl/2014}, ee = {http://dx.doi.org/10.1109/FPL.2014.6927401}, interhash = {a542b63ccccc678ae8ad17cd1f1dce27}, intrahash = {3db092fbeb162cc07df223f88cba6fef}, keywords = {dblp}, pages = {1-4}, publisher = {IEEE}, timestamp = {2016-02-02T14:19:35.000+0100}, title = {Heterogeneous dataflow architectures for FPGA-based sparse LU factorization.}, url = {http://dblp.uni-trier.de/db/conf/fpl/fpl2014.html#SiddharthaK14}, year = 2014 }