%0 Journal Article %1 journals/tvlsi/HuS02 %A Hu, Haitian %A Sapatnekar, Sachin S. %D 2002 %J IEEE Trans. VLSI Syst. %K dblp %N 6 %P 746-761 %T Efficient inductance extraction using circuit-aware techniques. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi10.html#HuS02 %V 10

@article{journals/tvlsi/HuS02, added-at = {2018-11-02T00:00:00.000+0100}, author = {Hu, Haitian and Sapatnekar, Sachin S.}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2663cd6fb534b5678c71e227de11f9393/dblp}, ee = {https://doi.org/10.1109/TVLSI.2002.808455}, interhash = {a3d7e17d3956671e20fad40a12f3f562}, intrahash = {663cd6fb534b5678c71e227de11f9393}, journal = {IEEE Trans. VLSI Syst.}, keywords = {dblp}, number = 6, pages = {746-761}, timestamp = {2019-09-27T06:53:18.000+0200}, title = {Efficient inductance extraction using circuit-aware techniques.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi10.html#HuS02}, volume = 10, year = 2002 }