%0 Conference Paper %1 conf/isqed/ZejdaD06 %A Zejda, Jindrich %A Ding, Li %B ISQED %D 2006 %I IEEE Computer Society %K dblp %P 147-152 %T TBNM - Transistor-Level Boundary Model for Fast Gate-Level Noise Analysis of Macro Blocks. %U http://dblp.uni-trier.de/db/conf/isqed/isqed2006.html#ZejdaD06 %@ 0-7695-2523-7

@inproceedings{conf/isqed/ZejdaD06, added-at = {2014-09-26T00:00:00.000+0200}, author = {Zejda, Jindrich and Ding, Li}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2d890ea056ac7e3fb17c5f2ae6f720826/dblp}, booktitle = {ISQED}, crossref = {conf/isqed/2006}, ee = {http://doi.ieeecomputersociety.org/10.1109/ISQED.2006.131}, interhash = {9f1d8b33f29a106346d0f933f6dc27cc}, intrahash = {d890ea056ac7e3fb17c5f2ae6f720826}, isbn = {0-7695-2523-7}, keywords = {dblp}, pages = {147-152}, publisher = {IEEE Computer Society}, timestamp = {2016-02-02T13:52:54.000+0100}, title = {TBNM - Transistor-Level Boundary Model for Fast Gate-Level Noise Analysis of Macro Blocks.}, url = {http://dblp.uni-trier.de/db/conf/isqed/isqed2006.html#ZejdaD06}, year = 2006 }