%0 Journal Article %1 journals/tcas/YuYYLZ14 %A Yu, Zheng %A Yu, Zhiyi %A Yu, Xueqiu %A Liu, Ningxi %A Zeng, Xiaoyang %D 2014 %J IEEE Trans. on Circuits and Systems %K dblp %N 6 %P 423-427 %T Low-Power Multicore Processor Design With Reconfigurable Same-Instruction Multiple Process. %U http://dblp.uni-trier.de/db/journals/tcas/tcasII61.html#YuYYLZ14 %V 61-II

@article{journals/tcas/YuYYLZ14, added-at = {2014-09-18T00:00:00.000+0200}, author = {Yu, Zheng and Yu, Zhiyi and Yu, Xueqiu and Liu, Ningxi and Zeng, Xiaoyang}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/22f43620a30163cefd321bdbbff91cbcc/dblp}, ee = {http://dx.doi.org/10.1109/TCSII.2014.2319676}, interhash = {93daa5e09536056478b4b2c7a51429b0}, intrahash = {2f43620a30163cefd321bdbbff91cbcc}, journal = {IEEE Trans. on Circuits and Systems}, keywords = {dblp}, number = 6, pages = {423-427}, timestamp = {2016-02-02T02:21:31.000+0100}, title = {Low-Power Multicore Processor Design With Reconfigurable Same-Instruction Multiple Process.}, url = {http://dblp.uni-trier.de/db/journals/tcas/tcasII61.html#YuYYLZ14}, volume = {61-II}, year = 2014 }