%0 Journal Article %1 journals/tcas/WangWZH17 %A Wang, Leiou %A Wang, Donghui %A Zheng, Feiyang %A Hao, Chengpeng %D 2017 %J IEEE Trans. on Circuits and Systems %K dblp %N 8 %P 992-996 %T An Iteration-Based Variable Step-Size Algorithm for Joint Explicit Adaptation of Time Delay. %U http://dblp.uni-trier.de/db/journals/tcas/tcasII64.html#WangWZH17 %V 64-II

@article{journals/tcas/WangWZH17, added-at = {2019-01-16T00:00:00.000+0100}, author = {Wang, Leiou and Wang, Donghui and Zheng, Feiyang and Hao, Chengpeng}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/24cc26920a74bd6d7e8f4925580e212c0/dblp}, ee = {https://doi.org/10.1109/TCSII.2016.2634592}, interhash = {87b251a8df62e06eb3a16f694ff7af16}, intrahash = {4cc26920a74bd6d7e8f4925580e212c0}, journal = {IEEE Trans. on Circuits and Systems}, keywords = {dblp}, number = 8, pages = {992-996}, timestamp = {2019-09-27T11:52:50.000+0200}, title = {An Iteration-Based Variable Step-Size Algorithm for Joint Explicit Adaptation of Time Delay.}, url = {http://dblp.uni-trier.de/db/journals/tcas/tcasII64.html#WangWZH17}, volume = {64-II}, year = 2017 }