%0 Journal Article %1 journals/jcst/HuZZYGW07 %A Hu, Weiwu %A Zhao, Ji-Ye %A Zhong, Shi-Qiang %A Yang, Xu %A Guidetti, Elio %A Wu, Chris %D 2007 %J J. Comput. Sci. Technol. %K dblp %N 1 %P 1-14 %T Implementing a 1GHz Four-Issue Out-of-Order Execution Microprocessor in a Standard Cell ASIC Methodology. %U http://dblp.uni-trier.de/db/journals/jcst/jcst22.html#HuZZYGW07 %V 22

@article{journals/jcst/HuZZYGW07, added-at = {2011-09-30T00:00:00.000+0200}, author = {Hu, Weiwu and Zhao, Ji-Ye and Zhong, Shi-Qiang and Yang, Xu and Guidetti, Elio and Wu, Chris}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2144ea8d41698ac74cf31d95ac4a2a240/dblp}, ee = {http://dx.doi.org/10.1007/s11390-007-9000-3}, interhash = {85056d7f46a6539428c2cb6206e8d4a0}, intrahash = {144ea8d41698ac74cf31d95ac4a2a240}, journal = {J. Comput. Sci. Technol.}, keywords = {dblp}, number = 1, pages = {1-14}, timestamp = {2016-02-02T01:22:53.000+0100}, title = {Implementing a 1GHz Four-Issue Out-of-Order Execution Microprocessor in a Standard Cell ASIC Methodology.}, url = {http://dblp.uni-trier.de/db/journals/jcst/jcst22.html#HuZZYGW07}, volume = 22, year = 2007 }