%0 Journal Article %1 journals/sigarch/RomanescuBOS07 %A Romanescu, Bogdan F. %A Bauer, Michael E. %A Ozev, Sule %A Sorin, Daniel J. %D 2007 %J SIGARCH Computer Architecture News %K dblp %N 5 %P 45-48 %T VariaSim: simulating circuits and systems in the presence of process variability. %U http://dblp.uni-trier.de/db/journals/sigarch/sigarch35.html#RomanescuBOS07 %V 35

@article{journals/sigarch/RomanescuBOS07, added-at = {2018-11-06T00:00:00.000+0100}, author = {Romanescu, Bogdan F. and Bauer, Michael E. and Ozev, Sule and Sorin, Daniel J.}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/234f1e3c00bb152656ccfdab4b38c3899/dblp}, ee = {https://doi.org/10.1145/1360464.1360465}, interhash = {80d9a14390fd62ae4b7229a99b9ccf14}, intrahash = {34f1e3c00bb152656ccfdab4b38c3899}, journal = {SIGARCH Computer Architecture News}, keywords = {dblp}, number = 5, pages = {45-48}, timestamp = {2019-09-27T06:00:15.000+0200}, title = {VariaSim: simulating circuits and systems in the presence of process variability.}, url = {http://dblp.uni-trier.de/db/journals/sigarch/sigarch35.html#RomanescuBOS07}, volume = 35, year = 2007 }