%0 Journal Article %1 journals/tvlsi/ZhuYGLYZZ15 %A rui Zhu, Wen %A Yang, Haigang %A Gao, Tongqiang %A Liu, Fei %A Yin, Tao %A Zhang, Dandan %A Zhang, Hongfeng %D 2015 %J IEEE Trans. VLSI Syst. %K dblp %N 1 %P 194-197 %T A 5.8-GHz Wideband TSPC Divide-by-16/17 Dual Modulus Prescaler. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi23.html#ZhuYGLYZZ15 %V 23

@article{journals/tvlsi/ZhuYGLYZZ15, added-at = {2015-06-18T00:00:00.000+0200}, author = {rui Zhu, Wen and Yang, Haigang and Gao, Tongqiang and Liu, Fei and Yin, Tao and Zhang, Dandan and Zhang, Hongfeng}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2972dd2de84d141917532a20577a384b1/dblp}, ee = {http://dx.doi.org/10.1109/TVLSI.2014.2300871}, interhash = {7e6233813b31ade325cbc1a38f216e8b}, intrahash = {972dd2de84d141917532a20577a384b1}, journal = {IEEE Trans. VLSI Syst.}, keywords = {dblp}, number = 1, pages = {194-197}, timestamp = {2016-02-02T02:13:30.000+0100}, title = {A 5.8-GHz Wideband TSPC Divide-by-16/17 Dual Modulus Prescaler.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi23.html#ZhuYGLYZZ15}, volume = 23, year = 2015 }