%0 Journal Article %1 journals/jssc/ChenLCL12 %A Chen, Chih-Lung %A Lin, Yu-Hsiang %A Chang, Hsie-Chia %A Lee, Chen-Yi %D 2012 %J J. Solid-State Circuits %K dblp %N 4 %P 817-831 %T A 2.37-Gb/s 284.8 mW Rate-Compatible (491, 3, 6) LDPC-CC Decoder. %U http://dblp.uni-trier.de/db/journals/jssc/jssc47.html#ChenLCL12 %V 47

@article{journals/jssc/ChenLCL12, added-at = {2012-04-24T00:00:00.000+0200}, author = {Chen, Chih-Lung and Lin, Yu-Hsiang and Chang, Hsie-Chia and Lee, Chen-Yi}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/20961d091b728e62117471a22be395a4a/dblp}, ee = {http://dx.doi.org/10.1109/JSSC.2012.2185193}, interhash = {7b6ebc88932082062070bc482ff1ba47}, intrahash = {0961d091b728e62117471a22be395a4a}, journal = {J. Solid-State Circuits}, keywords = {dblp}, number = 4, pages = {817-831}, timestamp = {2016-02-02T09:37:06.000+0100}, title = {A 2.37-Gb/s 284.8 mW Rate-Compatible (491, 3, 6) LDPC-CC Decoder.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc47.html#ChenLCL12}, volume = 47, year = 2012 }