%0 Journal Article %1 journals/tcas/RahimiBG13 %A Rahimi, Abbas %A Benini, Luca %A Gupta, Rajesh K. %D 2013 %J IEEE Trans. on Circuits and Systems %K dblp %N 12 %P 847-851 %T Spatial Memoization: Concurrent Instruction Reuse to Correct Timing Errors in SIMD Architectures. %U http://dblp.uni-trier.de/db/journals/tcas/tcasII60.html#RahimiBG13 %V 60-II

@article{journals/tcas/RahimiBG13, added-at = {2014-02-10T00:00:00.000+0100}, author = {Rahimi, Abbas and Benini, Luca and Gupta, Rajesh K.}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/26645e22ceeccf70aab29909cfb8dbf79/dblp}, ee = {http://dx.doi.org/10.1109/TCSII.2013.2281934}, interhash = {790751fce58f8d2001423a6c2795c74c}, intrahash = {6645e22ceeccf70aab29909cfb8dbf79}, journal = {IEEE Trans. on Circuits and Systems}, keywords = {dblp}, number = 12, pages = {847-851}, timestamp = {2016-02-02T02:21:39.000+0100}, title = {Spatial Memoization: Concurrent Instruction Reuse to Correct Timing Errors in SIMD Architectures.}, url = {http://dblp.uni-trier.de/db/journals/tcas/tcasII60.html#RahimiBG13}, volume = {60-II}, year = 2013 }