%0 Conference Paper %1 conf/asicon/LvYZW15 %A Lv, Xuemin %A Yang, Moucheng %A Zhou, Xuegong %A Wang, Lingli %B ASICON %D 2015 %I IEEE %K dblp %P 1-4 %T An automated test framework for SRAM-based FPGA. %U http://dblp.uni-trier.de/db/conf/asicon/asicon2015.html#LvYZW15 %@ 978-1-4799-8485-5

@inproceedings{conf/asicon/LvYZW15, added-at = {2018-07-17T00:00:00.000+0200}, author = {Lv, Xuemin and Yang, Moucheng and Zhou, Xuegong and Wang, Lingli}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2560f21cc00a5f13bbfad521426953627/dblp}, booktitle = {ASICON}, crossref = {conf/asicon/2015}, ee = {https://doi.org/10.1109/ASICON.2015.7517028}, interhash = {66247890f3bcb4468733445594736c46}, intrahash = {560f21cc00a5f13bbfad521426953627}, isbn = {978-1-4799-8485-5}, keywords = {dblp}, pages = {1-4}, publisher = {IEEE}, timestamp = {2019-09-27T17:19:01.000+0200}, title = {An automated test framework for SRAM-based FPGA.}, url = {http://dblp.uni-trier.de/db/conf/asicon/asicon2015.html#LvYZW15}, year = 2015 }