%0 Journal Article %1 journals/tsp/XiongTL06 %A Xiong, Cheng-Yi %A Tian, Jin-Wen %A Liu, Jian %D 2006 %J IEEE Trans. Signal Processing %K dblp %N 5 %P 1910-1916 %T A note on "Flipping structure: an efficient VLSI architecture for lifting-based discrete wavelet Transform". %U http://dblp.uni-trier.de/db/journals/tsp/tsp54.html#XiongTL06 %V 54

@article{journals/tsp/XiongTL06, added-at = {2016-03-09T00:00:00.000+0100}, author = {Xiong, Cheng-Yi and Tian, Jin-Wen and Liu, Jian}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/22f052c9c8e03ddeef894510226bdb907/dblp}, ee = {http://dx.doi.org/10.1109/TSP.2006.872538}, interhash = {6617264267331b635805a89da1a384d5}, intrahash = {2f052c9c8e03ddeef894510226bdb907}, journal = {IEEE Trans. Signal Processing}, keywords = {dblp}, number = 5, pages = {1910-1916}, timestamp = {2016-03-10T10:55:06.000+0100}, title = {A note on "Flipping structure: an efficient VLSI architecture for lifting-based discrete wavelet Transform".}, url = {http://dblp.uni-trier.de/db/journals/tsp/tsp54.html#XiongTL06}, volume = 54, year = 2006 }