%0 Journal Article %1 journals/tcad/ChuangLC11 %A Chuang, Yi-Lin %A Lee, Po-Wei %A Chang, Yao-Wen %D 2011 %J IEEE Trans. on CAD of Integrated Circuits and Systems %K dblp %N 11 %P 1649-1662 %T Voltage-Drop Aware Analytical Placement by Global Power Spreading for Mixed-Size Circuit Designs. %U http://dblp.uni-trier.de/db/journals/tcad/tcad30.html#ChuangLC11 %V 30

@article{journals/tcad/ChuangLC11, added-at = {2011-11-07T00:00:00.000+0100}, author = {Chuang, Yi-Lin and Lee, Po-Wei and Chang, Yao-Wen}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2d7793c82d5acafb61b49f592558a1e3f/dblp}, ee = {http://dx.doi.org/10.1109/TCAD.2011.2163071}, interhash = {65af8ec78f096b48465070aa3338ab86}, intrahash = {d7793c82d5acafb61b49f592558a1e3f}, journal = {IEEE Trans. on CAD of Integrated Circuits and Systems}, keywords = {dblp}, number = 11, pages = {1649-1662}, timestamp = {2016-02-02T10:07:47.000+0100}, title = {Voltage-Drop Aware Analytical Placement by Global Power Spreading for Mixed-Size Circuit Designs.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad30.html#ChuangLC11}, volume = 30, year = 2011 }