%0 Conference Paper %1 conf/ats/LoLLYM02 %A Luo, Zuying %A Li, Xiaowei %A Li, Huawei %A Yang, Shiyuan %A Min, Yinghua %B Asian Test Symposium %D 2002 %I IEEE Computer Society %K dblp %P 332-337 %T Test Power Optimization Techniques for CMOS Circuits. %U http://dblp.uni-trier.de/db/conf/ats/ats2002.html#LoLLYM02 %@ 0-7695-1825-7

@inproceedings{conf/ats/LoLLYM02, added-at = {2016-01-13T00:00:00.000+0100}, author = {Luo, Zuying and Li, Xiaowei and Li, Huawei and Yang, Shiyuan and Min, Yinghua}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2119ab844ea37aa5997849c07ab38475e/dblp}, booktitle = {Asian Test Symposium}, crossref = {conf/ats/2002}, ee = {http://doi.ieeecomputersociety.org/10.1109/ATS.2002.1181733}, interhash = {655f0547d31d7126bca19db1b714c8b5}, intrahash = {119ab844ea37aa5997849c07ab38475e}, isbn = {0-7695-1825-7}, keywords = {dblp}, pages = {332-337}, publisher = {IEEE Computer Society}, timestamp = {2016-02-02T14:23:16.000+0100}, title = {Test Power Optimization Techniques for CMOS Circuits.}, url = {http://dblp.uni-trier.de/db/conf/ats/ats2002.html#LoLLYM02}, year = 2002 }