%0 Conference Paper %1 conf/dac/SenguptaSHS17 %A Sengupta, Deepashree %A Snigdha, Farhana Sharmin %A Hu, Jiang %A Sapatnekar, Sachin S. %B DAC %D 2017 %I ACM %K dblp %P 72:1-72:6 %T SABER: Selection of Approximate Bits for the Design of Error Tolerant Circuits. %U http://dblp.uni-trier.de/db/conf/dac/dac2017.html#SenguptaSHS17 %@ 978-1-4503-4927-7

@inproceedings{conf/dac/SenguptaSHS17, added-at = {2018-11-06T00:00:00.000+0100}, author = {Sengupta, Deepashree and Snigdha, Farhana Sharmin and Hu, Jiang and Sapatnekar, Sachin S.}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/21297175a49ce022cceb453db1fdc495c/dblp}, booktitle = {DAC}, crossref = {conf/dac/2017}, ee = {https://doi.org/10.1145/3061639.3062314}, interhash = {64cf0167dcde3fa161838f2cae240175}, intrahash = {1297175a49ce022cceb453db1fdc495c}, isbn = {978-1-4503-4927-7}, keywords = {dblp}, pages = {72:1-72:6}, publisher = {ACM}, timestamp = {2019-09-27T18:39:22.000+0200}, title = {SABER: Selection of Approximate Bits for the Design of Error Tolerant Circuits.}, url = {http://dblp.uni-trier.de/db/conf/dac/dac2017.html#SenguptaSHS17}, year = 2017 }